mirror of
https://github.com/luau-lang/luau.git
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e25de95445
* Fixed indexing table intersections using `x["prop"]` syntax: https://github.com/Roblox/luau/pull/971 * Add console output codepage for Windows: https://github.com/Roblox/luau/pull/967 * Added `Frontend::parse` for a fast source graph preparation * luau_load should check GC * Work toward a type-diff system for nicer error messages New Solver * Correctly suppress errors in more cases * Further improvements to typechecking of function calls and return statements * Crash fixes * Propagate refinements drawn from the condition of a while loop into the loop body JIT * Fix accidental bailout for math.frexp/modf/sign in A64 * Work toward bringing type annotation info in * Do not propagate Luau IR constants of wrong type into load instructions * CHECK_SAFEENV exits to VM on failure * Implement error handling in A64 reg allocator * Inline the string.len builtin * Do not enter native code of a function if arguments don’t match --------- Co-authored-by: Arseny Kapoulkine <arseny.kapoulkine@gmail.com> Co-authored-by: Vyacheslav Egorov <vegorov@roblox.com>
563 lines
16 KiB
C++
563 lines
16 KiB
C++
// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#include "Luau/IrCallWrapperX64.h"
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#include "Luau/IrRegAllocX64.h"
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#include "doctest.h"
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using namespace Luau::CodeGen;
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using namespace Luau::CodeGen::X64;
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class IrCallWrapperX64Fixture
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{
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public:
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IrCallWrapperX64Fixture(ABIX64 abi = ABIX64::Windows)
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: build(/* logText */ true, abi)
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, regs(build, function)
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, callWrap(regs, build, ~0u)
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{
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}
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void checkMatch(std::string expected)
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{
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regs.assertAllFree();
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build.finalize();
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CHECK("\n" + build.text == expected);
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}
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AssemblyBuilderX64 build;
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IrFunction function;
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IrRegAllocX64 regs;
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IrCallWrapperX64 callWrap;
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// Tests rely on these to force interference between registers
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static constexpr RegisterX64 rArg1 = rcx;
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static constexpr RegisterX64 rArg1d = ecx;
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static constexpr RegisterX64 rArg2 = rdx;
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static constexpr RegisterX64 rArg2d = edx;
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static constexpr RegisterX64 rArg3 = r8;
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static constexpr RegisterX64 rArg3d = r8d;
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static constexpr RegisterX64 rArg4 = r9;
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static constexpr RegisterX64 rArg4d = r9d;
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};
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class IrCallWrapperX64FixtureSystemV : public IrCallWrapperX64Fixture
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{
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public:
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IrCallWrapperX64FixtureSystemV()
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: IrCallWrapperX64Fixture(ABIX64::SystemV)
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{
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}
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};
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TEST_SUITE_BEGIN("IrCallWrapperX64");
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "SimpleRegs")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rax, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, tmp1);
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callWrap.addArgument(SizeX64::qword, tmp2); // Already in its place
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rcx,rax
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "TrickyUse1")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, tmp1.reg); // Already in its place
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callWrap.addArgument(SizeX64::qword, tmp1.release());
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rdx,rcx
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "TrickyUse2")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg]);
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callWrap.addArgument(SizeX64::qword, tmp1.release());
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rdx,rcx
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mov rcx,qword ptr [rcx]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "SimpleMemImm")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rax, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rsi, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::dword, 32);
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callWrap.addArgument(SizeX64::dword, -1);
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callWrap.addArgument(SizeX64::qword, qword[r14 + 32]);
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callWrap.addArgument(SizeX64::qword, qword[tmp1.release() + tmp2.release()]);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov r8,qword ptr [r14+020h]
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mov r9,qword ptr [rax+rsi]
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mov ecx,20h
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mov edx,FFFFFFFFh
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "SimpleStackArgs")
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{
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ScopedRegX64 tmp{regs, regs.takeReg(rax, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, tmp);
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callWrap.addArgument(SizeX64::qword, qword[r14 + 16]);
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callWrap.addArgument(SizeX64::qword, qword[r14 + 32]);
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callWrap.addArgument(SizeX64::qword, qword[r14 + 48]);
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callWrap.addArgument(SizeX64::dword, 1);
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callWrap.addArgument(SizeX64::qword, qword[r13]);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rdx,qword ptr [r13]
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mov qword ptr [rsp+028h],rdx
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mov rcx,rax
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mov rdx,qword ptr [r14+010h]
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mov r8,qword ptr [r14+020h]
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mov r9,qword ptr [r14+030h]
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mov dword ptr [rsp+020h],1
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "FixedRegisters")
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{
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callWrap.addArgument(SizeX64::dword, 1);
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callWrap.addArgument(SizeX64::qword, 2);
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callWrap.addArgument(SizeX64::qword, 3);
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callWrap.addArgument(SizeX64::qword, 4);
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callWrap.addArgument(SizeX64::qword, r14);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov qword ptr [rsp+020h],r14
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mov ecx,1
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mov rdx,2
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mov r8,3
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mov r9,4
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "EasyInterference")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rdi, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rsi, kInvalidInstIdx)};
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ScopedRegX64 tmp3{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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ScopedRegX64 tmp4{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, tmp1);
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callWrap.addArgument(SizeX64::qword, tmp2);
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callWrap.addArgument(SizeX64::qword, tmp3);
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callWrap.addArgument(SizeX64::qword, tmp4);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov r8,rdx
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mov rdx,rsi
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mov r9,rcx
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mov rcx,rdi
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "FakeInterference")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, qword[tmp1.release() + 8]);
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callWrap.addArgument(SizeX64::qword, qword[tmp2.release() + 8]);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rcx,qword ptr [rcx+8]
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mov rdx,qword ptr [rdx+8]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "HardInterferenceInt")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg4, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg3, kInvalidInstIdx)};
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ScopedRegX64 tmp3{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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ScopedRegX64 tmp4{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, tmp1);
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callWrap.addArgument(SizeX64::qword, tmp2);
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callWrap.addArgument(SizeX64::qword, tmp3);
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callWrap.addArgument(SizeX64::qword, tmp4);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rax,r9
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mov r9,rcx
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mov rcx,rax
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mov rax,r8
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mov r8,rdx
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mov rdx,rax
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "HardInterferenceInt2")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg4d, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg3d, kInvalidInstIdx)};
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ScopedRegX64 tmp3{regs, regs.takeReg(rArg2d, kInvalidInstIdx)};
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ScopedRegX64 tmp4{regs, regs.takeReg(rArg1d, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::dword, tmp1);
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callWrap.addArgument(SizeX64::dword, tmp2);
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callWrap.addArgument(SizeX64::dword, tmp3);
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callWrap.addArgument(SizeX64::dword, tmp4);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov eax,r9d
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mov r9d,ecx
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mov ecx,eax
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mov eax,r8d
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mov r8d,edx
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mov edx,eax
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "HardInterferenceFp")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(xmm1, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(xmm0, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::xmmword, tmp1);
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callWrap.addArgument(SizeX64::xmmword, tmp2);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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vmovsd xmm2,xmm1,xmm1
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vmovsd xmm1,xmm0,xmm0
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vmovsd xmm0,xmm2,xmm2
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "HardInterferenceBoth")
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{
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ScopedRegX64 int1{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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ScopedRegX64 int2{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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ScopedRegX64 fp1{regs, regs.takeReg(xmm3, kInvalidInstIdx)};
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ScopedRegX64 fp2{regs, regs.takeReg(xmm2, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, int1);
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callWrap.addArgument(SizeX64::qword, int2);
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callWrap.addArgument(SizeX64::xmmword, fp1);
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callWrap.addArgument(SizeX64::xmmword, fp2);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rax,rdx
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mov rdx,rcx
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mov rcx,rax
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vmovsd xmm0,xmm3,xmm3
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vmovsd xmm3,xmm2,xmm2
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vmovsd xmm2,xmm0,xmm0
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "FakeMultiuseInterferenceMem")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg + tmp2.reg + 8]);
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callWrap.addArgument(SizeX64::qword, qword[tmp2.reg + 16]);
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tmp1.release();
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tmp2.release();
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rcx,qword ptr [rcx+rdx+8]
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mov rdx,qword ptr [rdx+010h]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "HardMultiuseInterferenceMem1")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg + tmp2.reg + 8]);
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg + 16]);
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tmp1.release();
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tmp2.release();
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rax,rcx
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mov rcx,qword ptr [rax+rdx+8]
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mov rdx,qword ptr [rax+010h]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "HardMultiuseInterferenceMem2")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg + tmp2.reg + 8]);
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg + tmp2.reg + 16]);
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tmp1.release();
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tmp2.release();
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rax,rcx
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mov rcx,qword ptr [rax+rdx+8]
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mov rdx,qword ptr [rax+rdx+010h]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "HardMultiuseInterferenceMem3")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg3, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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ScopedRegX64 tmp3{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg + tmp2.reg + 8]);
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callWrap.addArgument(SizeX64::qword, qword[tmp2.reg + tmp3.reg + 16]);
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callWrap.addArgument(SizeX64::qword, qword[tmp3.reg + tmp1.reg + 16]);
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tmp1.release();
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tmp2.release();
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tmp3.release();
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callWrap.call(qword[r12]);
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checkMatch(R"(
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mov rax,r8
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mov r8,qword ptr [rcx+rax+010h]
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mov rbx,rdx
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mov rdx,qword ptr [rbx+rcx+010h]
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mov rcx,qword ptr [rax+rbx+8]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "InterferenceWithCallArg1")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, qword[tmp1.reg + 8]);
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callWrap.call(qword[tmp1.release() + 16]);
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checkMatch(R"(
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mov rax,rcx
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mov rcx,qword ptr [rax+8]
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call qword ptr [rax+010h]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "InterferenceWithCallArg2")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, tmp2);
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callWrap.call(qword[tmp1.release() + 16]);
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checkMatch(R"(
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mov rax,rcx
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mov rcx,rdx
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call qword ptr [rax+010h]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "InterferenceWithCallArg3")
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{
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ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
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callWrap.addArgument(SizeX64::qword, tmp1.reg);
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callWrap.call(qword[tmp1.release() + 16]);
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checkMatch(R"(
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call qword ptr [rcx+010h]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "WithLastIrInstUse1")
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{
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IrInst irInst1;
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IrOp irOp1 = {IrOpKind::Inst, 0};
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irInst1.regX64 = regs.takeReg(xmm0, irOp1.index);
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irInst1.lastUse = 1;
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function.instructions.push_back(irInst1);
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callWrap.instIdx = irInst1.lastUse;
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callWrap.addArgument(SizeX64::xmmword, irInst1.regX64, irOp1); // Already in its place
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callWrap.addArgument(SizeX64::xmmword, qword[r12 + 8]);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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vmovsd xmm1,qword ptr [r12+8]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "WithLastIrInstUse2")
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{
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IrInst irInst1;
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IrOp irOp1 = {IrOpKind::Inst, 0};
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irInst1.regX64 = regs.takeReg(xmm0, irOp1.index);
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irInst1.lastUse = 1;
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function.instructions.push_back(irInst1);
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callWrap.instIdx = irInst1.lastUse;
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callWrap.addArgument(SizeX64::xmmword, qword[r12 + 8]);
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callWrap.addArgument(SizeX64::xmmword, irInst1.regX64, irOp1);
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callWrap.call(qword[r12]);
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checkMatch(R"(
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vmovsd xmm1,xmm0,xmm0
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vmovsd xmm0,qword ptr [r12+8]
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call qword ptr [r12]
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)");
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}
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TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "WithLastIrInstUse3")
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{
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IrInst irInst1;
|
|
IrOp irOp1 = {IrOpKind::Inst, 0};
|
|
irInst1.regX64 = regs.takeReg(xmm0, irOp1.index);
|
|
irInst1.lastUse = 1;
|
|
function.instructions.push_back(irInst1);
|
|
callWrap.instIdx = irInst1.lastUse;
|
|
|
|
callWrap.addArgument(SizeX64::xmmword, irInst1.regX64, irOp1);
|
|
callWrap.addArgument(SizeX64::xmmword, irInst1.regX64, irOp1);
|
|
callWrap.call(qword[r12]);
|
|
|
|
checkMatch(R"(
|
|
vmovsd xmm1,xmm0,xmm0
|
|
call qword ptr [r12]
|
|
)");
|
|
}
|
|
|
|
TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "WithLastIrInstUse4")
|
|
{
|
|
IrInst irInst1;
|
|
IrOp irOp1 = {IrOpKind::Inst, 0};
|
|
irInst1.regX64 = regs.takeReg(rax, irOp1.index);
|
|
irInst1.lastUse = 1;
|
|
function.instructions.push_back(irInst1);
|
|
callWrap.instIdx = irInst1.lastUse;
|
|
|
|
ScopedRegX64 tmp{regs, regs.takeReg(rdx, kInvalidInstIdx)};
|
|
callWrap.addArgument(SizeX64::qword, r15);
|
|
callWrap.addArgument(SizeX64::qword, irInst1.regX64, irOp1);
|
|
callWrap.addArgument(SizeX64::qword, tmp);
|
|
callWrap.call(qword[r12]);
|
|
|
|
checkMatch(R"(
|
|
mov rcx,r15
|
|
mov r8,rdx
|
|
mov rdx,rax
|
|
call qword ptr [r12]
|
|
)");
|
|
}
|
|
|
|
TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "ExtraCoverage")
|
|
{
|
|
ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
|
|
ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
|
|
callWrap.addArgument(SizeX64::qword, addr[r12 + 8]);
|
|
callWrap.addArgument(SizeX64::qword, addr[r12 + 16]);
|
|
callWrap.addArgument(SizeX64::xmmword, xmmword[r13]);
|
|
callWrap.call(qword[tmp1.release() + tmp2.release()]);
|
|
|
|
checkMatch(R"(
|
|
vmovups xmm2,xmmword ptr [r13]
|
|
mov rax,rcx
|
|
lea rcx,none ptr [r12+8]
|
|
mov rbx,rdx
|
|
lea rdx,none ptr [r12+010h]
|
|
call qword ptr [rax+rbx]
|
|
)");
|
|
}
|
|
|
|
TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "AddressInStackArguments")
|
|
{
|
|
callWrap.addArgument(SizeX64::dword, 1);
|
|
callWrap.addArgument(SizeX64::dword, 2);
|
|
callWrap.addArgument(SizeX64::dword, 3);
|
|
callWrap.addArgument(SizeX64::dword, 4);
|
|
callWrap.addArgument(SizeX64::qword, addr[r12 + 16]);
|
|
callWrap.call(qword[r14]);
|
|
|
|
checkMatch(R"(
|
|
lea rax,none ptr [r12+010h]
|
|
mov qword ptr [rsp+020h],rax
|
|
mov ecx,1
|
|
mov edx,2
|
|
mov r8d,3
|
|
mov r9d,4
|
|
call qword ptr [r14]
|
|
)");
|
|
}
|
|
|
|
TEST_CASE_FIXTURE(IrCallWrapperX64Fixture, "ImmediateConflictWithFunction")
|
|
{
|
|
ScopedRegX64 tmp1{regs, regs.takeReg(rArg1, kInvalidInstIdx)};
|
|
ScopedRegX64 tmp2{regs, regs.takeReg(rArg2, kInvalidInstIdx)};
|
|
|
|
callWrap.addArgument(SizeX64::dword, 1);
|
|
callWrap.addArgument(SizeX64::dword, 2);
|
|
callWrap.call(qword[tmp1.release() + tmp2.release()]);
|
|
|
|
checkMatch(R"(
|
|
mov rax,rcx
|
|
mov ecx,1
|
|
mov rbx,rdx
|
|
mov edx,2
|
|
call qword ptr [rax+rbx]
|
|
)");
|
|
}
|
|
|
|
TEST_CASE_FIXTURE(IrCallWrapperX64FixtureSystemV, "SuggestedConflictWithReserved")
|
|
{
|
|
ScopedRegX64 tmp{regs, regs.takeReg(r9, kInvalidInstIdx)};
|
|
|
|
IrCallWrapperX64 callWrap(regs, build);
|
|
callWrap.addArgument(SizeX64::qword, r12);
|
|
callWrap.addArgument(SizeX64::qword, r13);
|
|
callWrap.addArgument(SizeX64::qword, r14);
|
|
callWrap.addArgument(SizeX64::dword, 2);
|
|
callWrap.addArgument(SizeX64::qword, 1);
|
|
|
|
RegisterX64 reg = callWrap.suggestNextArgumentRegister(SizeX64::dword);
|
|
build.mov(reg, 10);
|
|
callWrap.addArgument(SizeX64::dword, reg);
|
|
|
|
callWrap.call(tmp.release());
|
|
|
|
checkMatch(R"(
|
|
mov eax,Ah
|
|
mov rdi,r12
|
|
mov rsi,r13
|
|
mov rdx,r14
|
|
mov rcx,r9
|
|
mov r9d,eax
|
|
mov rax,rcx
|
|
mov ecx,2
|
|
mov r8,1
|
|
call rax
|
|
)");
|
|
}
|
|
|
|
TEST_SUITE_END();
|