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1212fdacbf
Once again, all of our changes this week are for new type solver and the JIT. In the new type solver, we fixed cyclic type alias handling and multiple stability issues. In the JIT, our main progress was for arm64, where, after lowering 36% of instructions, we start seeing first Luau functions executing natively. For x64, we performed code cleanup and refactoring to allow for future optimizations.
62 lines
1.4 KiB
C++
62 lines
1.4 KiB
C++
// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#pragma once
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#include "Luau/RegisterA64.h"
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#include <stddef.h>
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namespace Luau
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{
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namespace CodeGen
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{
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namespace A64
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{
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enum class AddressKindA64 : uint8_t
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{
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imm, // reg + imm
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reg, // reg + reg
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// TODO:
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// reg + reg << shift
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// reg + sext(reg) << shift
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// reg + uext(reg) << shift
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};
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struct AddressA64
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{
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// This is a little misleading since AddressA64 can encode offsets up to 1023*size where size depends on the load/store size
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// For example, ldr x0, [reg+imm] is limited to 8 KB offsets assuming imm is divisible by 8, but loading into w0 reduces the range to 4 KB
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static constexpr size_t kMaxOffset = 1023;
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AddressA64(RegisterA64 base, int off = 0)
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: kind(AddressKindA64::imm)
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, base(base)
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, offset(xzr)
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, data(off)
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{
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LUAU_ASSERT(base.kind == KindA64::x || base == sp);
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}
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AddressA64(RegisterA64 base, RegisterA64 offset)
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: kind(AddressKindA64::reg)
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, base(base)
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, offset(offset)
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, data(0)
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{
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LUAU_ASSERT(base.kind == KindA64::x);
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LUAU_ASSERT(offset.kind == KindA64::x);
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}
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AddressKindA64 kind;
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RegisterA64 base;
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RegisterA64 offset;
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int data;
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};
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using mem = AddressA64;
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} // namespace A64
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} // namespace CodeGen
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} // namespace Luau
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