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d141a5c48d
* Fixed exported types not being suggested in autocomplete * `T...` is now convertible to `...any` (Fixes https://github.com/Roblox/luau/issues/767) * Fixed issue with `T?` not being convertible to `T | T` or `T?` (sometimes when internal pointer identity is different) * Fixed potential crash in missing table key error suggestion to use a similar existing key * `lua_topointer` now returns a pointer for strings C++ API Changes: * `prepareModuleScope` callback has moved from TypeChecker to Frontend * For LSPs, AstQuery functions (and `isWithinComment`) can be used without full Frontend data A lot of changes in our two experimental components as well. In our work on the new type-solver, the following issues were fixed: * Fixed table union and intersection indexing * Correct custom type environments are now used * Fixed issue with values of `free & number` type not accepted in numeric operations And these are the changes in native code generation (JIT): * arm64 lowering is almost complete with support for 99% of IR commands and all fastcalls * Fixed x64 assembly encoding for extended byte registers * More external x64 calls are aware of register allocator * `math.min`/`math.max` with more than 2 arguments are now lowered to IR as well * Fixed correctness issues with `math` library calls with multiple results in variadic context and with x64 register conflicts * x64 register allocator learnt to restore values from VM memory instead of always using stack spills * x64 exception unwind information now supports multiple functions and fixes function start offset in Dwarf2 info
62 lines
1.4 KiB
C++
62 lines
1.4 KiB
C++
// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#pragma once
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#include "Luau/RegisterA64.h"
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#include <stddef.h>
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namespace Luau
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{
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namespace CodeGen
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{
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namespace A64
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{
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enum class AddressKindA64 : uint8_t
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{
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imm, // reg + imm
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reg, // reg + reg
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// TODO:
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// reg + reg << shift
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// reg + sext(reg) << shift
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// reg + uext(reg) << shift
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};
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struct AddressA64
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{
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// This is a little misleading since AddressA64 can encode offsets up to 1023*size where size depends on the load/store size
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// For example, ldr x0, [reg+imm] is limited to 8 KB offsets assuming imm is divisible by 8, but loading into w0 reduces the range to 4 KB
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static constexpr size_t kMaxOffset = 1023;
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constexpr AddressA64(RegisterA64 base, int off = 0)
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: kind(AddressKindA64::imm)
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, base(base)
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, offset(xzr)
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, data(off)
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{
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LUAU_ASSERT(base.kind == KindA64::x || base == sp);
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}
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constexpr AddressA64(RegisterA64 base, RegisterA64 offset)
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: kind(AddressKindA64::reg)
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, base(base)
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, offset(offset)
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, data(0)
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{
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LUAU_ASSERT(base.kind == KindA64::x);
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LUAU_ASSERT(offset.kind == KindA64::x);
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}
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AddressKindA64 kind;
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RegisterA64 base;
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RegisterA64 offset;
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int data;
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};
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using mem = AddressA64;
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} // namespace A64
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} // namespace CodeGen
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} // namespace Luau
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