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Merge fixes

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This commit is contained in:
Vyacheslav Egorov 2024-03-01 16:22:18 +02:00
parent f36cae2109
commit ed4ce84e55
2 changed files with 2 additions and 7 deletions
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4
CodeGen/src/IrLoweringX64.cpp
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@ -2237,7 +2237,7 @@ OperandX64 IrLoweringX64::bufferAddrOp(IrOp bufferOp, IrOp indexOp)
RegisterX64 IrLoweringX64::vecOp(IrOp op, ScopedRegX64& tmp) RegisterX64 IrLoweringX64::vecOp(IrOp op, ScopedRegX64& tmp)
{ {
if (FFlag::LuauCodegenVectorOptAnd && FFlag::LuauCodegenVectorTag) if (FFlag::LuauCodegenVectorOptAnd && FFlag::LuauCodegenVectorTag2)
{ {
IrInst source = function.instOp(op); IrInst source = function.instOp(op);
CODEGEN_ASSERT(source.cmd != IrCmd::SUBSTITUTE); // we don't process substitutions CODEGEN_ASSERT(source.cmd != IrCmd::SUBSTITUTE); // we don't process substitutions
@ -2298,7 +2298,7 @@ OperandX64 IrLoweringX64::vectorAndMaskOp()
OperandX64 IrLoweringX64::vectorOrMaskOp() OperandX64 IrLoweringX64::vectorOrMaskOp()
{ {
CODEGEN_ASSERT(!FFlag::LuauCodegenVectorTag); CODEGEN_ASSERT(!FFlag::LuauCodegenVectorTag2);
if (vectorOrMask.base == noreg) if (vectorOrMask.base == noreg)
vectorOrMask = build.u32x4(0, 0, 0, LUA_TVECTOR); vectorOrMask = build.u32x4(0, 0, 0, LUA_TVECTOR);

5
tests/IrLowering.test.cpp
View File

@ -64,7 +64,6 @@ TEST_SUITE_BEGIN("IrLowering");
TEST_CASE("VectorReciprocal") TEST_CASE("VectorReciprocal")
{ {
ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true}; ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true};
ScopedFastFlag luauCodegenVectorTag{FFlag::LuauCodegenVectorTag, true};
CHECK_EQ("\n" + getCodegenAssembly(R"( CHECK_EQ("\n" + getCodegenAssembly(R"(
local function vecrcp(a: vector) local function vecrcp(a: vector)
@ -126,7 +125,6 @@ bb_bytecode_1:
TEST_CASE("VectorAdd") TEST_CASE("VectorAdd")
{ {
ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true}; ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true};
ScopedFastFlag luauCodegenVectorTag{FFlag::LuauCodegenVectorTag, true};
CHECK_EQ("\n" + getCodegenAssembly(R"( CHECK_EQ("\n" + getCodegenAssembly(R"(
local function vec3add(a: vector, b: vector) local function vec3add(a: vector, b: vector)
@ -155,7 +153,6 @@ bb_bytecode_1:
TEST_CASE("VectorMinus") TEST_CASE("VectorMinus")
{ {
ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true}; ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true};
ScopedFastFlag luauCodegenVectorTag{FFlag::LuauCodegenVectorTag, true};
CHECK_EQ("\n" + getCodegenAssembly(R"( CHECK_EQ("\n" + getCodegenAssembly(R"(
local function vec3minus(a: vector) local function vec3minus(a: vector)
@ -182,7 +179,6 @@ bb_bytecode_1:
TEST_CASE("VectorSubMulDiv") TEST_CASE("VectorSubMulDiv")
{ {
ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true}; ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true};
ScopedFastFlag luauCodegenVectorTag{FFlag::LuauCodegenVectorTag, true};
CHECK_EQ("\n" + getCodegenAssembly(R"( CHECK_EQ("\n" + getCodegenAssembly(R"(
local function vec3combo(a: vector, b: vector, c: vector, d: vector) local function vec3combo(a: vector, b: vector, c: vector, d: vector)
@ -257,7 +253,6 @@ bb_bytecode_1:
TEST_CASE("VectorMulDivMixed") TEST_CASE("VectorMulDivMixed")
{ {
ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true}; ScopedFastFlag luauCodegenVectorTag2{FFlag::LuauCodegenVectorTag2, true};
ScopedFastFlag luauCodegenVectorTag{FFlag::LuauCodegenVectorTag, true};
CHECK_EQ("\n" + getCodegenAssembly(R"( CHECK_EQ("\n" + getCodegenAssembly(R"(
local function vec3combo(a: vector, b: vector, c: vector, d: vector) local function vec3combo(a: vector, b: vector, c: vector, d: vector)