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Add SUBRK and DIVRK bytecode instructions to bytecode v5 (#1115)
Right now, we can compile R\*K for all arithmetic instructions, but K\*R gets compiled into two instructions (LOADN/LOADK + arithmetic opcode). This is problematic since it leads to reduced performance for some code. However, we'd like to avoid adding reverse variants of ADDK et al for all opcodes to avoid the increase in I$ footprint for interpreter. Looking at the arithmetic instructions, % and // don't have interesting use cases for K\*V; ^ is sometimes used with constant on the left hand side but this would need to call pow() by necessity in all cases so it would be slow regardless of the dispatch overhead. This leaves the four basic arithmetic operations. For + and \*, we can implement a compiler-side optimization in the future that transforms K\*R to R\*K automatically. This could either be done unconditionally at -O2, or conditionally based on the type of the value (driven by type annotations / inference) -- this technically changes behavior in presence of metamethods, although it might be sensible to just always do this because non-commutative +/* are evil. However, for - and / it is impossible for the compiler to optimize this in the future, so we need dedicated opcodes. This only increases the interpreter size by ~300 bytes (~1.5%) on X64. This makes spectral-norm and math-partial-sums 6% faster; maybe more importantly, voxelgen gets 1.5% faster (so this change does have real-world impact). To avoid the proliferation of bytecode versions this change piggybacks on the bytecode version bump that was just made in 604 for vector constants; we would still be able to enable these independently but we'll consider v5 complete when both are enabled. Related: #626 --------- Co-authored-by: vegorov-rbx <75688451+vegorov-rbx@users.noreply.github.com>
This commit is contained in:
Arseny Kapoulkine
GitHub
parent
7fb7f4382d
commit
89b437bb4e
@ -41,6 +41,11 @@ static void visitVmRegDefsUses(T& visitor, IrFunction& function, const IrInst& i
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break;
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// A <- B, C
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case IrCmd::DO_ARITH:
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visitor.maybeUse(inst.b); // Argument can also be a VmConst
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visitor.maybeUse(inst.c); // Argument can also be a VmConst
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visitor.def(inst.a);
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break;
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case IrCmd::GET_TABLE:
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visitor.use(inst.b);
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visitor.maybeUse(inst.c); // Argument can also be a VmConst
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@ -148,12 +148,12 @@ void convertNumberToIndexOrJump(AssemblyBuilderX64& build, RegisterX64 tmp, Regi
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build.jcc(ConditionX64::NotZero, label);
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}
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void callArithHelper(IrRegAllocX64& regs, AssemblyBuilderX64& build, int ra, int rb, OperandX64 c, TMS tm)
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void callArithHelper(IrRegAllocX64& regs, AssemblyBuilderX64& build, int ra, OperandX64 b, OperandX64 c, TMS tm)
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{
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IrCallWrapperX64 callWrap(regs, build);
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callWrap.addArgument(SizeX64::qword, rState);
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callWrap.addArgument(SizeX64::qword, luauRegAddress(ra));
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callWrap.addArgument(SizeX64::qword, luauRegAddress(rb));
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callWrap.addArgument(SizeX64::qword, b);
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callWrap.addArgument(SizeX64::qword, c);
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callWrap.addArgument(SizeX64::dword, tm);
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callWrap.call(qword[rNativeContext + offsetof(NativeContext, luaV_doarith)]);
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@ -200,7 +200,7 @@ ConditionX64 getConditionInt(IrCondition cond);
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void getTableNodeAtCachedSlot(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 node, RegisterX64 table, int pcpos);
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void convertNumberToIndexOrJump(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 numd, RegisterX64 numi, Label& label);
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void callArithHelper(IrRegAllocX64& regs, AssemblyBuilderX64& build, int ra, int rb, OperandX64 c, TMS tm);
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void callArithHelper(IrRegAllocX64& regs, AssemblyBuilderX64& build, int ra, OperandX64 b, OperandX64 c, TMS tm);
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void callLengthHelper(IrRegAllocX64& regs, AssemblyBuilderX64& build, int ra, int rb);
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void callGetTable(IrRegAllocX64& regs, AssemblyBuilderX64& build, int rb, OperandX64 c, int ra);
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void callSetTable(IrRegAllocX64& regs, AssemblyBuilderX64& build, int rb, OperandX64 c, int ra);
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@ -381,6 +381,12 @@ void IrBuilder::translateInst(LuauOpcode op, const Instruction* pc, int i)
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case LOP_POWK:
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translateInstBinaryK(*this, pc, i, TM_POW);
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break;
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case LOP_SUBRK:
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translateInstBinaryRK(*this, pc, i, TM_SUB);
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break;
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case LOP_DIVRK:
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translateInstBinaryRK(*this, pc, i, TM_DIV);
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break;
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case LOP_NOT:
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translateInstNot(*this, pc);
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break;
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@ -1067,6 +1067,10 @@ void IrLoweringA64::lowerInst(IrInst& inst, uint32_t index, const IrBlock& next)
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regs.spill(build, index);
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build.mov(x0, rState);
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build.add(x1, rBase, uint16_t(vmRegOp(inst.a) * sizeof(TValue)));
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if (inst.b.kind == IrOpKind::VmConst)
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emitAddOffset(build, x2, rConstants, vmConstOp(inst.b) * sizeof(TValue));
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else
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build.add(x2, rBase, uint16_t(vmRegOp(inst.b) * sizeof(TValue)));
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if (inst.c.kind == IrOpKind::VmConst)
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@ -962,11 +962,12 @@ void IrLoweringX64::lowerInst(IrInst& inst, uint32_t index, const IrBlock& next)
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break;
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}
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case IrCmd::DO_ARITH:
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if (inst.c.kind == IrOpKind::VmReg)
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callArithHelper(regs, build, vmRegOp(inst.a), vmRegOp(inst.b), luauRegAddress(vmRegOp(inst.c)), TMS(intOp(inst.d)));
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else
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callArithHelper(regs, build, vmRegOp(inst.a), vmRegOp(inst.b), luauConstantAddress(vmConstOp(inst.c)), TMS(intOp(inst.d)));
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{
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OperandX64 opb = inst.b.kind == IrOpKind::VmReg ? luauRegAddress(vmRegOp(inst.b)) : luauConstantAddress(vmConstOp(inst.b));
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OperandX64 opc = inst.c.kind == IrOpKind::VmReg ? luauRegAddress(vmRegOp(inst.c)) : luauConstantAddress(vmConstOp(inst.c));
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callArithHelper(regs, build, vmRegOp(inst.a), opb, opc, TMS(intOp(inst.d)));
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break;
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}
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case IrCmd::DO_LEN:
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callLengthHelper(regs, build, vmRegOp(inst.a), vmRegOp(inst.b));
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break;
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@ -327,13 +327,16 @@ void translateInstJumpxEqS(IrBuilder& build, const Instruction* pc, int pcpos)
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build.beginBlock(next);
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}
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static void translateInstBinaryNumeric(IrBuilder& build, int ra, int rb, int rc, IrOp opc, int pcpos, TMS tm)
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static void translateInstBinaryNumeric(IrBuilder& build, int ra, int rb, int rc, IrOp opb, IrOp opc, int pcpos, TMS tm)
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{
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IrOp fallback = build.block(IrBlockKind::Fallback);
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// fast-path: number
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if (rb != -1)
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{
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IrOp tb = build.inst(IrCmd::LOAD_TAG, build.vmReg(rb));
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build.inst(IrCmd::CHECK_TAG, tb, build.constTag(LUA_TNUMBER), fallback);
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}
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if (rc != -1 && rc != rb) // TODO: optimization should handle second check, but we'll test it later
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{
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@ -341,11 +344,23 @@ static void translateInstBinaryNumeric(IrBuilder& build, int ra, int rb, int rc,
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build.inst(IrCmd::CHECK_TAG, tc, build.constTag(LUA_TNUMBER), fallback);
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}
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IrOp vb = build.inst(IrCmd::LOAD_DOUBLE, build.vmReg(rb));
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IrOp vc;
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IrOp vb, vc;
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IrOp result;
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if (opb.kind == IrOpKind::VmConst)
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{
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LUAU_ASSERT(build.function.proto);
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TValue protok = build.function.proto->k[vmConstOp(opb)];
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LUAU_ASSERT(protok.tt == LUA_TNUMBER);
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vb = build.constDouble(protok.value.n);
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}
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else
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{
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vb = build.inst(IrCmd::LOAD_DOUBLE, opb);
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}
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if (opc.kind == IrOpKind::VmConst)
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{
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LUAU_ASSERT(build.function.proto);
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@ -409,18 +424,26 @@ static void translateInstBinaryNumeric(IrBuilder& build, int ra, int rb, int rc,
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FallbackStreamScope scope(build, fallback, next);
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build.inst(IrCmd::SET_SAVEDPC, build.constUint(pcpos + 1));
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build.inst(IrCmd::DO_ARITH, build.vmReg(ra), build.vmReg(rb), opc, build.constInt(tm));
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build.inst(IrCmd::DO_ARITH, build.vmReg(ra), opb, opc, build.constInt(tm));
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build.inst(IrCmd::JUMP, next);
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}
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void translateInstBinary(IrBuilder& build, const Instruction* pc, int pcpos, TMS tm)
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{
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translateInstBinaryNumeric(build, LUAU_INSN_A(*pc), LUAU_INSN_B(*pc), LUAU_INSN_C(*pc), build.vmReg(LUAU_INSN_C(*pc)), pcpos, tm);
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translateInstBinaryNumeric(
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build, LUAU_INSN_A(*pc), LUAU_INSN_B(*pc), LUAU_INSN_C(*pc), build.vmReg(LUAU_INSN_B(*pc)), build.vmReg(LUAU_INSN_C(*pc)), pcpos, tm);
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}
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void translateInstBinaryK(IrBuilder& build, const Instruction* pc, int pcpos, TMS tm)
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{
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translateInstBinaryNumeric(build, LUAU_INSN_A(*pc), LUAU_INSN_B(*pc), -1, build.vmConst(LUAU_INSN_C(*pc)), pcpos, tm);
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translateInstBinaryNumeric(
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build, LUAU_INSN_A(*pc), LUAU_INSN_B(*pc), -1, build.vmReg(LUAU_INSN_B(*pc)), build.vmConst(LUAU_INSN_C(*pc)), pcpos, tm);
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}
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void translateInstBinaryRK(IrBuilder& build, const Instruction* pc, int pcpos, TMS tm)
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{
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translateInstBinaryNumeric(
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build, LUAU_INSN_A(*pc), -1, LUAU_INSN_C(*pc), build.vmConst(LUAU_INSN_B(*pc)), build.vmReg(LUAU_INSN_C(*pc)), pcpos, tm);
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}
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void translateInstNot(IrBuilder& build, const Instruction* pc)
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@ -35,6 +35,7 @@ void translateInstJumpxEqN(IrBuilder& build, const Instruction* pc, int pcpos);
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void translateInstJumpxEqS(IrBuilder& build, const Instruction* pc, int pcpos);
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void translateInstBinary(IrBuilder& build, const Instruction* pc, int pcpos, TMS tm);
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void translateInstBinaryK(IrBuilder& build, const Instruction* pc, int pcpos, TMS tm);
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void translateInstBinaryRK(IrBuilder& build, const Instruction* pc, int pcpos, TMS tm);
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void translateInstNot(IrBuilder& build, const Instruction* pc);
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void translateInstMinus(IrBuilder& build, const Instruction* pc, int pcpos);
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void translateInstLength(IrBuilder& build, const Instruction* pc, int pcpos);
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@ -45,7 +45,7 @@
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// Version 2: Adds Proto::linedefined. Supported until 0.544.
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// Version 3: Adds FORGPREP/JUMPXEQK* and enhances AUX encoding for FORGLOOP. Removes FORGLOOP_NEXT/INEXT and JUMPIFEQK/JUMPIFNOTEQK. Currently supported.
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// Version 4: Adds Proto::flags, typeinfo, and floor division opcodes IDIV/IDIVK. Currently supported.
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// Version 5: Adds vector constants. Currently supported.
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// Version 5: Adds SUBRK/DIVRK and vector constants. Currently supported.
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// Bytecode opcode, part of the instruction header
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enum LuauOpcode
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@ -219,7 +219,7 @@ enum LuauOpcode
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// ADDK, SUBK, MULK, DIVK, MODK, POWK: compute arithmetic operation between the source register and a constant and put the result into target register
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// A: target register
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// B: source register
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// C: constant table index (0..255)
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// C: constant table index (0..255); must refer to a number
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LOP_ADDK,
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LOP_SUBK,
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LOP_MULK,
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@ -348,9 +348,12 @@ enum LuauOpcode
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// B: source register (for VAL/REF) or upvalue index (for UPVAL/UPREF)
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LOP_CAPTURE,
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// removed in v3
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LOP_DEP_JUMPIFEQK,
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LOP_DEP_JUMPIFNOTEQK,
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// SUBRK, DIVRK: compute arithmetic operation between the constant and a source register and put the result into target register
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// A: target register
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// B: source register
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// C: constant table index (0..255); must refer to a number
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LOP_SUBRK,
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LOP_DIVRK,
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// FASTCALL1: perform a fast call of a built-in function using 1 register argument
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// A: builtin function id (see LuauBuiltinFunction)
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@ -8,6 +8,7 @@
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#include <string.h>
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LUAU_FASTFLAG(LuauVectorLiterals)
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LUAU_FASTFLAG(LuauCompileRevK)
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namespace Luau
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{
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@ -1123,7 +1124,7 @@ std::string BytecodeBuilder::getError(const std::string& message)
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uint8_t BytecodeBuilder::getVersion()
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{
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// This function usually returns LBC_VERSION_TARGET but may sometimes return a higher number (within LBC_VERSION_MIN/MAX) under fast flags
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return (FFlag::LuauVectorLiterals ? 5 : LBC_VERSION_TARGET);
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return (FFlag::LuauVectorLiterals || FFlag::LuauCompileRevK) ? 5 : LBC_VERSION_TARGET;
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}
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uint8_t BytecodeBuilder::getTypeEncodingVersion()
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@ -1351,6 +1352,13 @@ void BytecodeBuilder::validateInstructions() const
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VCONST(LUAU_INSN_C(insn), Number);
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break;
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case LOP_SUBRK:
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case LOP_DIVRK:
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VREG(LUAU_INSN_A(insn));
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VCONST(LUAU_INSN_B(insn), Number);
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VREG(LUAU_INSN_C(insn));
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break;
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case LOP_AND:
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case LOP_OR:
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VREG(LUAU_INSN_A(insn));
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@ -1973,6 +1981,18 @@ void BytecodeBuilder::dumpInstruction(const uint32_t* code, std::string& result,
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result.append("]\n");
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break;
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case LOP_SUBRK:
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formatAppend(result, "SUBRK R%d K%d [", LUAU_INSN_A(insn), LUAU_INSN_B(insn));
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dumpConstant(result, LUAU_INSN_B(insn));
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formatAppend(result, "] R%d\n", LUAU_INSN_C(insn));
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break;
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case LOP_DIVRK:
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formatAppend(result, "DIVRK R%d K%d [", LUAU_INSN_A(insn), LUAU_INSN_B(insn));
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dumpConstant(result, LUAU_INSN_B(insn));
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formatAppend(result, "] R%d\n", LUAU_INSN_C(insn));
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break;
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case LOP_AND:
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formatAppend(result, "AND R%d R%d R%d\n", LUAU_INSN_A(insn), LUAU_INSN_B(insn), LUAU_INSN_C(insn));
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break;
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@ -29,6 +29,8 @@ LUAU_FASTINTVARIABLE(LuauCompileInlineDepth, 5)
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LUAU_FASTFLAGVARIABLE(LuauCompileSideEffects, false)
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LUAU_FASTFLAGVARIABLE(LuauCompileDeadIf, false)
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LUAU_FASTFLAGVARIABLE(LuauCompileRevK, false)
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namespace Luau
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{
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@ -1516,6 +1518,20 @@ struct Compiler
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}
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else
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{
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if (FFlag::LuauCompileRevK && (expr->op == AstExprBinary::Sub || expr->op == AstExprBinary::Div))
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{
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int32_t lc = getConstantNumber(expr->left);
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if (lc >= 0 && lc <= 255)
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{
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uint8_t rr = compileExprAuto(expr->right, rs);
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LuauOpcode op = (expr->op == AstExprBinary::Sub) ? LOP_SUBRK : LOP_DIVRK;
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bytecode.emitABC(op, target, uint8_t(lc), uint8_t(rr));
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return;
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}
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}
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uint8_t rl = compileExprAuto(expr->left, rs);
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uint8_t rr = compileExprAuto(expr->right, rs);
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@ -101,7 +101,7 @@
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VM_DISPATCH_OP(LOP_FORGLOOP), VM_DISPATCH_OP(LOP_FORGPREP_INEXT), VM_DISPATCH_OP(LOP_DEP_FORGLOOP_INEXT), VM_DISPATCH_OP(LOP_FORGPREP_NEXT), \
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VM_DISPATCH_OP(LOP_NATIVECALL), VM_DISPATCH_OP(LOP_GETVARARGS), VM_DISPATCH_OP(LOP_DUPCLOSURE), VM_DISPATCH_OP(LOP_PREPVARARGS), \
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VM_DISPATCH_OP(LOP_LOADKX), VM_DISPATCH_OP(LOP_JUMPX), VM_DISPATCH_OP(LOP_FASTCALL), VM_DISPATCH_OP(LOP_COVERAGE), \
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VM_DISPATCH_OP(LOP_CAPTURE), VM_DISPATCH_OP(LOP_DEP_JUMPIFEQK), VM_DISPATCH_OP(LOP_DEP_JUMPIFNOTEQK), VM_DISPATCH_OP(LOP_FASTCALL1), \
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VM_DISPATCH_OP(LOP_CAPTURE), VM_DISPATCH_OP(LOP_SUBRK), VM_DISPATCH_OP(LOP_DIVRK), VM_DISPATCH_OP(LOP_FASTCALL1), \
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VM_DISPATCH_OP(LOP_FASTCALL2), VM_DISPATCH_OP(LOP_FASTCALL2K), VM_DISPATCH_OP(LOP_FORGPREP), VM_DISPATCH_OP(LOP_JUMPXEQKNIL), \
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VM_DISPATCH_OP(LOP_JUMPXEQKB), VM_DISPATCH_OP(LOP_JUMPXEQKN), VM_DISPATCH_OP(LOP_JUMPXEQKS), VM_DISPATCH_OP(LOP_IDIV), \
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VM_DISPATCH_OP(LOP_IDIVK),
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@ -1858,9 +1858,9 @@ reentry:
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}
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else if (ttisvector(rb))
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{
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const float* vb = rb->value.v;
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float vc = cast_to(float, nvalue(kv));
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setvvalue(ra, vb[0] / vc, vb[1] / vc, vb[2] / vc, vb[3] / vc);
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const float* vb = vvalue(rb);
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float nc = cast_to(float, nvalue(kv));
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setvvalue(ra, vb[0] / nc, vb[1] / nc, vb[2] / nc, vb[3] / nc);
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VM_NEXT();
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}
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else
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@ -2697,16 +2697,53 @@ reentry:
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LUAU_UNREACHABLE();
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}
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VM_CASE(LOP_DEP_JUMPIFEQK)
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VM_CASE(LOP_SUBRK)
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{
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LUAU_ASSERT(!"Unsupported deprecated opcode");
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LUAU_UNREACHABLE();
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Instruction insn = *pc++;
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StkId ra = VM_REG(LUAU_INSN_A(insn));
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TValue* kv = VM_KV(LUAU_INSN_B(insn));
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StkId rc = VM_REG(LUAU_INSN_C(insn));
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// fast-path
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if (ttisnumber(rc))
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{
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setnvalue(ra, nvalue(kv) - nvalue(rc));
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VM_NEXT();
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}
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else
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{
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// slow-path, may invoke C/Lua via metamethods
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VM_PROTECT(luaV_doarith(L, ra, kv, rc, TM_SUB));
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VM_NEXT();
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}
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}
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VM_CASE(LOP_DEP_JUMPIFNOTEQK)
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VM_CASE(LOP_DIVRK)
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{
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LUAU_ASSERT(!"Unsupported deprecated opcode");
|
||||
LUAU_UNREACHABLE();
|
||||
Instruction insn = *pc++;
|
||||
StkId ra = VM_REG(LUAU_INSN_A(insn));
|
||||
TValue* kv = VM_KV(LUAU_INSN_B(insn));
|
||||
StkId rc = VM_REG(LUAU_INSN_C(insn));
|
||||
|
||||
// fast-path
|
||||
if (LUAU_LIKELY(ttisnumber(rc)))
|
||||
{
|
||||
setnvalue(ra, nvalue(kv) / nvalue(rc));
|
||||
VM_NEXT();
|
||||
}
|
||||
else if (ttisvector(rc))
|
||||
{
|
||||
float nb = cast_to(float, nvalue(kv));
|
||||
const float* vc = vvalue(rc);
|
||||
setvvalue(ra, nb / vc[0], nb / vc[1], nb / vc[2], nb / vc[3]);
|
||||
VM_NEXT();
|
||||
}
|
||||
else
|
||||
{
|
||||
// slow-path, may invoke C/Lua via metamethods
|
||||
VM_PROTECT(luaV_doarith(L, ra, kv, rc, TM_DIV));
|
||||
VM_NEXT();
|
||||
}
|
||||
}
|
||||
|
||||
VM_CASE(LOP_FASTCALL1)
|
||||
|
||||
@ -1173,6 +1173,8 @@ RETURN R0 1
|
||||
|
||||
TEST_CASE("AndOrChainCodegen")
|
||||
{
|
||||
ScopedFastFlag sff("LuauCompileRevK", true);
|
||||
|
||||
const char* source = R"(
|
||||
return
|
||||
(1 - verticalGradientTurbulence < waterLevel + .015 and Enum.Material.Sand)
|
||||
@ -1181,23 +1183,22 @@ TEST_CASE("AndOrChainCodegen")
|
||||
)";
|
||||
|
||||
CHECK_EQ("\n" + compileFunction0(source), R"(
|
||||
LOADN R2 1
|
||||
GETIMPORT R3 1 [verticalGradientTurbulence]
|
||||
SUB R1 R2 R3
|
||||
GETIMPORT R3 4 [waterLevel]
|
||||
ADDK R2 R3 K2 [0.014999999999999999]
|
||||
GETIMPORT R2 2 [verticalGradientTurbulence]
|
||||
SUBRK R1 K0 [1] R2
|
||||
GETIMPORT R3 5 [waterLevel]
|
||||
ADDK R2 R3 K3 [0.014999999999999999]
|
||||
JUMPIFNOTLT R1 R2 L0
|
||||
GETIMPORT R0 8 [Enum.Material.Sand]
|
||||
GETIMPORT R0 9 [Enum.Material.Sand]
|
||||
JUMPIF R0 L2
|
||||
L0: GETIMPORT R1 10 [sandbank]
|
||||
L0: GETIMPORT R1 11 [sandbank]
|
||||
LOADN R2 0
|
||||
JUMPIFNOTLT R2 R1 L1
|
||||
GETIMPORT R1 10 [sandbank]
|
||||
GETIMPORT R1 11 [sandbank]
|
||||
LOADN R2 1
|
||||
JUMPIFNOTLT R1 R2 L1
|
||||
GETIMPORT R0 8 [Enum.Material.Sand]
|
||||
GETIMPORT R0 9 [Enum.Material.Sand]
|
||||
JUMPIF R0 L2
|
||||
L1: GETIMPORT R0 12 [Enum.Material.Sandstone]
|
||||
L1: GETIMPORT R0 13 [Enum.Material.Sandstone]
|
||||
L2: RETURN R0 1
|
||||
)");
|
||||
}
|
||||
@ -2096,6 +2097,8 @@ RETURN R0 0
|
||||
|
||||
TEST_CASE("AndOrOptimizations")
|
||||
{
|
||||
ScopedFastFlag sff("LuauCompileRevK", true);
|
||||
|
||||
// the OR/ORK optimization triggers for cutoff since lhs is simple
|
||||
CHECK_EQ("\n" + compileFunction(R"(
|
||||
local function advancedRidgedFilter(value, cutoff)
|
||||
@ -2108,17 +2111,15 @@ end
|
||||
R"(
|
||||
ORK R2 R1 K0 [0.5]
|
||||
SUB R0 R0 R2
|
||||
LOADN R4 1
|
||||
LOADN R8 0
|
||||
JUMPIFNOTLT R0 R8 L0
|
||||
MINUS R7 R0
|
||||
JUMPIF R7 L1
|
||||
L0: MOVE R7 R0
|
||||
L1: MULK R6 R7 K1 [1]
|
||||
LOADN R8 1
|
||||
SUB R7 R8 R2
|
||||
DIV R5 R6 R7
|
||||
SUB R3 R4 R5
|
||||
LOADN R7 0
|
||||
JUMPIFNOTLT R0 R7 L0
|
||||
MINUS R6 R0
|
||||
JUMPIF R6 L1
|
||||
L0: MOVE R6 R0
|
||||
L1: MULK R5 R6 K1 [1]
|
||||
SUBRK R6 K1 [1] R2
|
||||
DIV R4 R5 R6
|
||||
SUBRK R3 K1 [1] R4
|
||||
RETURN R3 1
|
||||
)");
|
||||
|
||||
@ -2131,9 +2132,8 @@ end
|
||||
0),
|
||||
R"(
|
||||
LOADB R2 0
|
||||
LOADK R4 K0 [0.5]
|
||||
MULK R5 R1 K1 [0.40000000000000002]
|
||||
SUB R3 R4 R5
|
||||
MULK R4 R1 K1 [0.40000000000000002]
|
||||
SUBRK R3 K0 [0.5] R4
|
||||
JUMPIFNOTLT R3 R0 L1
|
||||
LOADK R4 K0 [0.5]
|
||||
MULK R5 R1 K1 [0.40000000000000002]
|
||||
@ -2153,9 +2153,8 @@ end
|
||||
0),
|
||||
R"(
|
||||
LOADB R2 1
|
||||
LOADK R4 K0 [0.5]
|
||||
MULK R5 R1 K1 [0.40000000000000002]
|
||||
SUB R3 R4 R5
|
||||
MULK R4 R1 K1 [0.40000000000000002]
|
||||
SUBRK R3 K0 [0.5] R4
|
||||
JUMPIFLT R0 R3 L1
|
||||
LOADK R4 K0 [0.5]
|
||||
MULK R5 R1 K1 [0.40000000000000002]
|
||||
@ -7847,4 +7846,32 @@ RETURN R0 1
|
||||
)");
|
||||
}
|
||||
|
||||
TEST_CASE("ArithRevK")
|
||||
{
|
||||
ScopedFastFlag sff("LuauCompileRevK", true);
|
||||
|
||||
// - and / have special optimized form for reverse constants; in the future, + and * will likely get compiled to ADDK/MULK
|
||||
// other operators are not important enough to optimize reverse constant forms for
|
||||
CHECK_EQ("\n" + compileFunction0(R"(
|
||||
local x: number = unknown
|
||||
return 2 + x, 2 - x, 2 * x, 2 / x, 2 % x, 2 // x, 2 ^ x
|
||||
)"),
|
||||
R"(
|
||||
GETIMPORT R0 1 [unknown]
|
||||
LOADN R2 2
|
||||
ADD R1 R2 R0
|
||||
SUBRK R2 K2 [2] R0
|
||||
LOADN R4 2
|
||||
MUL R3 R4 R0
|
||||
DIVRK R4 K2 [2] R0
|
||||
LOADN R6 2
|
||||
MOD R5 R6 R0
|
||||
LOADN R7 2
|
||||
IDIV R6 R7 R0
|
||||
LOADN R8 2
|
||||
POW R7 R8 R0
|
||||
RETURN R1 7
|
||||
)");
|
||||
}
|
||||
|
||||
TEST_SUITE_END();
|
||||
|
||||
Loading…
Reference in New Issue
Block a user