2022-10-14 06:59:53 +08:00
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// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#pragma once
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#include "Luau/AssemblyBuilderX64.h"
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#include "lobject.h"
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#include "ltm.h"
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// MS x64 ABI reminder:
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// Arguments: rcx, rdx, r8, r9 ('overlapped' with xmm0-xmm3)
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// Return: rax, xmm0
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// Nonvolatile: r12-r15, rdi, rsi, rbx, rbp
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// SIMD: only xmm6-xmm15 are non-volatile, all ymm upper parts are volatile
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// AMD64 ABI reminder:
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// Arguments: rdi, rsi, rdx, rcx, r8, r9 (xmm0-xmm7)
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// Return: rax, rdx, xmm0, xmm1
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// Nonvolatile: r12-r15, rbx, rbp
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// SIMD: all volatile
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namespace Luau
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{
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namespace CodeGen
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{
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struct NativeState;
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// Data that is very common to access is placed in non-volatile registers
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constexpr RegisterX64 rState = r15; // lua_State* L
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constexpr RegisterX64 rBase = r14; // StkId base
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constexpr RegisterX64 rNativeContext = r13; // NativeContext* context
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constexpr RegisterX64 rConstants = r12; // TValue* k
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// Native code is as stackless as the interpreter, so we can place some data on the stack once and have it accessible at any point
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2022-11-11 06:04:44 +08:00
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// See CodeGenX64.cpp for layout
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constexpr unsigned kStackSize = 32 + 16; // 4 home locations for registers, 16 bytes for additional function call arguments
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constexpr unsigned kLocalsSize = 24; // 3 extra slots for our custom locals (also aligns the stack to 16 byte boundary)
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constexpr OperandX64 sClosure = qword[rsp + kStackSize + 0]; // Closure* cl
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constexpr OperandX64 sCode = qword[rsp + kStackSize + 8]; // Instruction* code
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2022-10-14 06:59:53 +08:00
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2022-10-22 01:33:43 +08:00
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// TODO: These should be replaced with a portable call function that checks the ABI at runtime and reorders moves accordingly to avoid conflicts
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2022-10-14 06:59:53 +08:00
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#if defined(_WIN32)
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constexpr RegisterX64 rArg1 = rcx;
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constexpr RegisterX64 rArg2 = rdx;
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constexpr RegisterX64 rArg3 = r8;
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constexpr RegisterX64 rArg4 = r9;
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constexpr RegisterX64 rArg5 = noreg;
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constexpr RegisterX64 rArg6 = noreg;
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constexpr OperandX64 sArg5 = qword[rsp + 32];
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constexpr OperandX64 sArg6 = qword[rsp + 40];
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#else
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constexpr RegisterX64 rArg1 = rdi;
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constexpr RegisterX64 rArg2 = rsi;
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constexpr RegisterX64 rArg3 = rdx;
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constexpr RegisterX64 rArg4 = rcx;
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constexpr RegisterX64 rArg5 = r8;
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constexpr RegisterX64 rArg6 = r9;
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constexpr OperandX64 sArg5 = noreg;
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constexpr OperandX64 sArg6 = noreg;
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#endif
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constexpr unsigned kTValueSizeLog2 = 4;
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2022-10-22 01:33:43 +08:00
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constexpr unsigned kLuaNodeSizeLog2 = 5;
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constexpr unsigned kLuaNodeTagMask = 0xf;
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constexpr unsigned kOffsetOfLuaNodeTag = 12; // offsetof cannot be used on a bit field
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constexpr unsigned kOffsetOfInstructionC = 3;
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2022-10-14 06:59:53 +08:00
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2022-10-28 06:22:49 +08:00
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// Leaf functions that are placed in every module to perform common instruction sequences
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struct ModuleHelpers
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{
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Label exitContinueVm;
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Label exitNoContinueVm;
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2022-11-05 01:02:37 +08:00
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Label continueCallInVm;
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2022-10-28 06:22:49 +08:00
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};
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2022-10-14 06:59:53 +08:00
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inline OperandX64 luauReg(int ri)
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{
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return xmmword[rBase + ri * sizeof(TValue)];
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}
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2022-11-05 01:02:37 +08:00
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inline OperandX64 luauRegAddress(int ri)
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{
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return addr[rBase + ri * sizeof(TValue)];
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}
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2022-10-14 06:59:53 +08:00
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inline OperandX64 luauRegValue(int ri)
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{
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return qword[rBase + ri * sizeof(TValue) + offsetof(TValue, value)];
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}
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inline OperandX64 luauRegTag(int ri)
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{
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return dword[rBase + ri * sizeof(TValue) + offsetof(TValue, tt)];
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}
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inline OperandX64 luauRegValueBoolean(int ri)
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{
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return dword[rBase + ri * sizeof(TValue) + offsetof(TValue, value)];
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}
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inline OperandX64 luauConstant(int ki)
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{
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return xmmword[rConstants + ki * sizeof(TValue)];
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}
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2022-11-05 01:02:37 +08:00
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inline OperandX64 luauConstantAddress(int ki)
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{
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return addr[rConstants + ki * sizeof(TValue)];
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}
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2022-10-22 01:33:43 +08:00
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inline OperandX64 luauConstantTag(int ki)
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{
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return dword[rConstants + ki * sizeof(TValue) + offsetof(TValue, tt)];
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}
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2022-10-14 06:59:53 +08:00
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inline OperandX64 luauConstantValue(int ki)
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{
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return qword[rConstants + ki * sizeof(TValue) + offsetof(TValue, value)];
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}
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2022-10-22 01:33:43 +08:00
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inline OperandX64 luauNodeKeyValue(RegisterX64 node)
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{
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return qword[node + offsetof(LuaNode, key) + offsetof(TKey, value)];
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}
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2022-10-28 06:22:49 +08:00
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// Note: tag has dirty upper bits
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inline OperandX64 luauNodeKeyTag(RegisterX64 node)
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{
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return dword[node + offsetof(LuaNode, key) + kOffsetOfLuaNodeTag];
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}
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2022-10-22 01:33:43 +08:00
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inline OperandX64 luauNodeValue(RegisterX64 node)
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{
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return xmmword[node + offsetof(LuaNode, val)];
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}
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2022-10-14 06:59:53 +08:00
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inline void setLuauReg(AssemblyBuilderX64& build, RegisterX64 tmp, int ri, OperandX64 op)
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{
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LUAU_ASSERT(op.cat == CategoryX64::mem);
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build.vmovups(tmp, op);
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build.vmovups(luauReg(ri), tmp);
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}
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2022-10-22 01:33:43 +08:00
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inline void setNodeValue(AssemblyBuilderX64& build, RegisterX64 tmp, OperandX64 op, int ri)
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{
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LUAU_ASSERT(op.cat == CategoryX64::mem);
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build.vmovups(tmp, luauReg(ri));
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build.vmovups(op, tmp);
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}
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2022-10-14 06:59:53 +08:00
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inline void jumpIfTagIs(AssemblyBuilderX64& build, int ri, lua_Type tag, Label& label)
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{
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build.cmp(luauRegTag(ri), tag);
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build.jcc(ConditionX64::Equal, label);
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}
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inline void jumpIfTagIsNot(AssemblyBuilderX64& build, int ri, lua_Type tag, Label& label)
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{
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build.cmp(luauRegTag(ri), tag);
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build.jcc(ConditionX64::NotEqual, label);
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2022-10-14 06:59:53 +08:00
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}
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// Note: fallthrough label should be placed after this condition
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inline void jumpIfFalsy(AssemblyBuilderX64& build, int ri, Label& target, Label& fallthrough)
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{
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jumpIfTagIs(build, ri, LUA_TNIL, target); // false if nil
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jumpIfTagIsNot(build, ri, LUA_TBOOLEAN, fallthrough); // true if not nil or boolean
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build.cmp(luauRegValueBoolean(ri), 0);
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build.jcc(ConditionX64::Equal, target); // true if boolean value is 'true'
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2022-10-14 06:59:53 +08:00
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}
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// Note: fallthrough label should be placed after this condition
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inline void jumpIfTruthy(AssemblyBuilderX64& build, int ri, Label& target, Label& fallthrough)
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{
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jumpIfTagIs(build, ri, LUA_TNIL, fallthrough); // false if nil
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jumpIfTagIsNot(build, ri, LUA_TBOOLEAN, target); // true if not nil or boolean
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build.cmp(luauRegValueBoolean(ri), 0);
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build.jcc(ConditionX64::NotEqual, target); // true if boolean value is 'true'
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2022-10-14 06:59:53 +08:00
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}
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inline void jumpIfMetatablePresent(AssemblyBuilderX64& build, RegisterX64 table, Label& target)
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{
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build.cmp(qword[table + offsetof(Table, metatable)], 0);
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2022-11-05 01:02:37 +08:00
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build.jcc(ConditionX64::NotEqual, target);
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2022-10-14 06:59:53 +08:00
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}
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inline void jumpIfUnsafeEnv(AssemblyBuilderX64& build, RegisterX64 tmp, Label& label)
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{
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build.mov(tmp, sClosure);
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build.mov(tmp, qword[tmp + offsetof(Closure, env)]);
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build.test(byte[tmp + offsetof(Table, safeenv)], 1);
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build.jcc(ConditionX64::Zero, label); // Not a safe environment
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}
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inline void jumpIfTableIsReadOnly(AssemblyBuilderX64& build, RegisterX64 table, Label& label)
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{
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build.cmp(byte[table + offsetof(Table, readonly)], 0);
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build.jcc(ConditionX64::NotEqual, label);
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2022-10-14 06:59:53 +08:00
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}
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2022-10-22 01:33:43 +08:00
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inline void jumpIfNodeKeyTagIsNot(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 node, lua_Type tag, Label& label)
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{
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tmp.size = SizeX64::dword;
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2022-10-28 06:22:49 +08:00
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build.mov(tmp, luauNodeKeyTag(node));
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2022-10-22 01:33:43 +08:00
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build.and_(tmp, kLuaNodeTagMask);
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build.cmp(tmp, tag);
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2022-11-05 01:02:37 +08:00
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build.jcc(ConditionX64::NotEqual, label);
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2022-10-22 01:33:43 +08:00
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}
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inline void jumpIfNodeValueTagIs(AssemblyBuilderX64& build, RegisterX64 node, lua_Type tag, Label& label)
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{
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build.cmp(dword[node + offsetof(LuaNode, val) + offsetof(TValue, tt)], tag);
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build.jcc(ConditionX64::Equal, label);
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2022-10-22 01:33:43 +08:00
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}
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inline void jumpIfNodeKeyNotInExpectedSlot(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 node, OperandX64 expectedKey, Label& label)
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{
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jumpIfNodeKeyTagIsNot(build, tmp, node, LUA_TSTRING, label);
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build.mov(tmp, expectedKey);
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build.cmp(tmp, luauNodeKeyValue(node));
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build.jcc(ConditionX64::NotEqual, label);
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2022-10-22 01:33:43 +08:00
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jumpIfNodeValueTagIs(build, node, LUA_TNIL, label);
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}
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2022-11-05 01:02:37 +08:00
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void jumpOnNumberCmp(AssemblyBuilderX64& build, RegisterX64 tmp, OperandX64 lhs, OperandX64 rhs, ConditionX64 cond, Label& label);
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void jumpOnAnyCmpFallback(AssemblyBuilderX64& build, int ra, int rb, ConditionX64 cond, Label& label, int pcpos);
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2022-10-14 06:59:53 +08:00
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2022-10-22 01:33:43 +08:00
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RegisterX64 getTableNodeAtCachedSlot(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 table, int pcpos);
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2022-10-14 06:59:53 +08:00
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void convertNumberToIndexOrJump(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 numd, RegisterX64 numi, int ri, Label& label);
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void callArithHelper(AssemblyBuilderX64& build, int ra, int rb, OperandX64 c, int pcpos, TMS tm);
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void callLengthHelper(AssemblyBuilderX64& build, int ra, int rb, int pcpos);
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void callPrepareForN(AssemblyBuilderX64& build, int limit, int step, int init, int pcpos);
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void callGetTable(AssemblyBuilderX64& build, int rb, OperandX64 c, int ra, int pcpos);
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void callSetTable(AssemblyBuilderX64& build, int rb, OperandX64 c, int ra, int pcpos);
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void callBarrierTable(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 table, int ra, Label& skip);
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2022-10-22 01:33:43 +08:00
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void callBarrierObject(AssemblyBuilderX64& build, RegisterX64 tmp, RegisterX64 object, int ra, Label& skip);
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void callBarrierTableFast(AssemblyBuilderX64& build, RegisterX64 table, Label& skip);
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void callCheckGc(AssemblyBuilderX64& build, int pcpos, bool savepc, Label& skip);
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2022-10-14 06:59:53 +08:00
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void emitExit(AssemblyBuilderX64& build, bool continueInVm);
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void emitUpdateBase(AssemblyBuilderX64& build);
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void emitSetSavedPc(AssemblyBuilderX64& build, int pcpos); // Note: only uses rax/rdx, the caller may use other registers
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void emitInterrupt(AssemblyBuilderX64& build, int pcpos);
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void emitFallback(AssemblyBuilderX64& build, NativeState& data, int op, int pcpos);
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2022-11-05 01:02:37 +08:00
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void emitContinueCallInVm(AssemblyBuilderX64& build);
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void emitExitFromLastReturn(AssemblyBuilderX64& build);
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2022-10-14 06:59:53 +08:00
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} // namespace CodeGen
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} // namespace Luau
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